From 95d8529e705869aefff9e508d6eec95ed5640d5c Mon Sep 17 00:00:00 2001 From: Paul Harrison Date: Sat, 6 Jun 2026 03:54:24 -0400 Subject: initial, not complete. --- jpcpu.v | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 jpcpu.v (limited to 'jpcpu.v') diff --git a/jpcpu.v b/jpcpu.v new file mode 100644 index 0000000..5094e40 --- /dev/null +++ b/jpcpu.v @@ -0,0 +1,42 @@ +module jpcpu + (input i_clk, + input i_rst, + input [3:0] i_dip, + output [3:0] o_led); + + reg [3:0] pc; + reg [3:0] a; + reg [3:0] b; + reg c; + + wire [3:0] opcode; + wire [3:0] operand; + wire [4:0] sum; + + assign opcode = instruction[7:4]; + assign operand = instruction[3:0]; + assign sum = (opcode[0] ? b : a) + operand; + + always @(posedge i_clk, posedge i_rst) begin + if (i_rst) begin + pc <= 0; + a <= 0; + b <= 0; + c <= 0; + end else begin + case (opcode) + 4'b0011: a <= operand; + 4'b0111: b <= operand; + 4'b0001: a <= b; + 4'b0100: b <= a; + 4'b0000: a <= a + operand; + 4'b0101: b <= b + operand; + 4'b0010: a <= i_dip; + 4'b0110: b <= i_dip; + 4'b1011: o_led <= operand; + 4'b1001: o_led <= b; + 4'b1100: pc <= + endcase + end + end +endmodule; // jpcpu -- cgit v1.2.3